1. Field
This disclosure relates generally to data processors, and more specifically, to the execution of branch instructions by data processors.
2. Related Art
Various compression and decompression methods are known to reduce and reconstruct the size or bit length of data processing instructions and data operands such as addresses. The compression methods are implemented for the purpose of reducing the size of communication buses and memory storage required to store such instructions and operands. In one form, a common portion of higher order address bits are stored in a memory at a single storage location and shared with each of a plurality of low order address bits within a range defined for the high order bits. Pipeline stalls can occur when transitioning between differing high order bits.
Other compression methods include the compressing or shortening of software code. When the operands that are being compressed are address values, an available range of address values is significantly reduced. As a result, the ability of a data processing system to operate effectively is typically limited. With shorter address ranges, more operands are required to be retrieved from a main memory rather than a cache and system performance is thereby degraded.